Represents a CPU core in the system. More...

#include <cpu.h>

Public Member Functions
	Core (hardwarecommunication::madt_processor_apic_t *madt_item)
	Constructs a new Core object from the MADT entry.

void	wake_up (CPU *cpu)
	Wakes up the core by sending the appropriate IPIs. (see core_loader.s for startup code)

void	init ()
	Initialises the core by setting up the GDT, IDT, TSS, SSE and APIC.

Public Attributes
bool	xsave_enabled = false
	Whether XSAVE is enabled.

bool	avx_enabled = false
	Whether AVX is enabled.

uint8_t	id
	The ID of this core.

tss_t	tss = { }
	The Task State Segment for this core.

bool	active = false
	Whether this core is active.

hardwarecommunication::LocalAPIC *	local_apic = nullptr
	The local APIC for this core.

GlobalDescriptorTable *	gdt = nullptr
	The GDT for this core.

processes::Scheduler *	scheduler = nullptr
	The scheduler for this core.

Protected Member Functions
void	init_tss ()
	Initialises the task state segment for this cor.

void	init_sse ()
	Initialises the SSE instructions.

Protected Attributes
hardwarecommunication::madt_processor_apic_t *	m_madt
	The MADT entry for this core.

bool	m_enabled = false
	Whether the core is enabled.

bool	m_can_enable = false
	Whether the core can be enabled.

bool	m_bsp = false
	Whether this core is the bootstrap processor.

uint8_t	m_apic_id
	The ID of the apic for this core.

uint64_t	m_stack = 0
	The stack pointer for this core.

Friends
class	CPU

Detailed Description

Represents a CPU core in the system.

Definition at line 216 of file cpu.h.

Constructor & Destructor Documentation

◆ Core()

Core::Core ( hardwarecommunication::madt_processor_apic_t * madt_item )

explicit

Constructs a new Core object from the MADT entry.

Parameters

madt_item The MADT entry for this core

Definition at line 36 of file cpu.cpp.

: m_madt(madt_item)
{
 
    id          = m_madt->processor_id;
    m_apic_id   = m_madt->apic_id;
 
    m_enabled       = (m_madt->flags & 0x1) != 0;
    m_can_enable    = (m_madt->flags & 0x2) != 0;
 
    m_stack = (uint64_t)MemoryManager::kmalloc(BOOT_STACK_SIZE);
 
    Logger::DEBUG() << "Found CPU ID: " << id << " with APIC ID: " << m_apic_id << " (enabled = " << (string)m_enabled << ", can be enabled = " <<  (string)m_can_enable  << ")\n";
 
}

References MaxOS::system::BOOT_STACK_SIZE, MaxOS::Logger::DEBUG(), MaxOS::memory::MemoryManager::kmalloc(), m_apic_id, m_can_enable, m_enabled, m_madt, and m_stack.

Member Function Documentation

◆ init()

void Core::init ( )

Initialises the core by setting up the GDT, IDT, TSS, SSE and APIC.

Definition at line 227 of file cpu.cpp.

                {
 
    // Load the kernel IDT & GDT
    gdt = new GlobalDescriptorTable();
    InterruptManager::load_current();
 
    // Setup this core's clock
    local_apic = new LocalAPIC;
    Clock::active_clock()->setup_apic_clock(local_apic);
 
    // Delegate large initiation
    init_sse();
    init_tss();
 
    active = true;
}

References active, MaxOS::hardwarecommunication::Clock::active_clock(), gdt, init_sse(), init_tss(), MaxOS::hardwarecommunication::InterruptManager::load_current(), local_apic, and MaxOS::hardwarecommunication::Clock::setup_apic_clock().

◆ init_sse()

void Core::init_sse ( )

protected

Initialises the SSE instructions.

Definition at line 166 of file cpu.cpp.

                    {
 
    // Get the CR0 register
    uint64_t cr0;
    asm volatile("mov %%cr0, %0" : "=r" (cr0));
 
    // Get the CR4 register
    uint64_t cr4;
    asm volatile("mov %%cr4, %0" : "=r" (cr4));
 
    // Check if FPU is supported
    ASSERT(CPU::check_cpu_feature(CPU_FEATURE_EDX::FPU), "FPU not supported - needed for SSE");
 
    // Clear the emulation flag, task switch flags and enable the monitor coprocessor, native exception bits
    cr0 |= (1 << 1);
    cr0 &= ~(1 << 2);
    cr0 &= ~(1 << 3);
    cr0 |= (1 << 5);
    asm volatile("mov %0, %%cr0" : : "r" (cr0));
 
    // Enable the FPU
    asm volatile("fninit");
 
    // Check if SSE is supported
    ASSERT(CPU::check_cpu_feature(CPU_FEATURE_EDX::SSE), "SSE not supported");
 
    // Enable FSAVE, FSTORE and SSE instructions
    cr4 |= (1 << 9);
    cr4 |= (1 << 10);
    asm volatile("mov %0, %%cr4" : : "r" (cr4));
 
    // Check if XSAVE is supported
    xsave_enabled = CPU::check_cpu_feature(CPU_FEATURE_ECX::XSAVE) && CPU::check_cpu_feature(CPU_FEATURE_ECX::OSXSAVE);
    Logger::DEBUG() << "XSAVE: " << (xsave_enabled ? "Supported" : "Not Supported") << "\n";
    if (!xsave_enabled) return;
 
    // Enable the XSAVE and XRESTORE instructions
    cr4 |= (1 << 18);
    asm volatile("mov %0, %%cr4" : : "r" (cr4));
 
    // Set the SSE and x87 bits
    uint64_t xcr0;
    asm volatile("xgetbv" : "=a" (xcr0) : "c" (0));
    xcr0 |= 0x7;
    asm volatile("xsetbv" : : "c" (0), "a" (xcr0));
 
    // Check if AVX is supported
    avx_enabled = CPU::check_cpu_feature(CPU_FEATURE_ECX::AVX);
    Logger::DEBUG() << "AVX: " << (avx_enabled ? "Supported" : "Not Supported") << "\n";
    if (!avx_enabled) return;
 
    // Enable the AVX instructions
    cr4 |= (1 << 14);
    asm volatile("mov %0, %%cr4" : : "r" (cr4));
 
    Logger::DEBUG() << "SSE Enabled\n";
}

References avx_enabled, MaxOS::system::CPU::check_cpu_feature(), MaxOS::Logger::DEBUG(), and xsave_enabled.

Referenced by init().

◆ init_tss()

void Core::init_tss ( )

protected

Initialises the task state segment for this cor.

Definition at line 108 of file cpu.cpp.

                    {
 
    // The reserved have to be 0
    tss.reserved0 = 0;
    tss.reserved1 = 0;
    tss.reserved2 = 0;
    tss.reserved3 = 0;
 
    // Kernel stack (scheduler will set the threads stack)
    tss.rsp0 = (uint64_t)m_stack + BOOT_STACK_SIZE;
    tss.rsp1 = 0;
    tss.rsp2 = 0;
 
    // Interrupt stacks can all be 0 (@todo implment)
    tss.ist1 = 0;
    tss.ist2 = 0;
    tss.ist3 = 0;
    tss.ist4 = 0;
    tss.ist5 = 0;
    tss.ist6 = 0;
    tss.ist7 = 0;
 
    // All ports denied by default
    memset(&tss.io_bitmap, 0xFF, sizeof(tss.io_bitmap));
    tss.io_bitmap[IO_BITMAP_SIZE] = 0xFF;
    tss.io_bitmap_offset = offsetof(tss_t, io_bitmap);
 
    // Split the base into 4 parts (16 bits, 8 bits, 8 bits, 32 bits)
    auto base = (uint64_t) &tss;
    uint16_t base_1 = base & 0xFFFF;
    uint8_t base_2 = (base >> 16) & 0xFF;
    uint8_t base_3 = (base >> 24) & 0xFF;
    uint32_t base_4 = (base >> 32) & 0xFFFFFFFF;
 
    auto limit_low = (uint16_t)(sizeof(tss) - 1);
 
    // Flags: 1 - Type = 0x9, Descriptor Privilege Level = 0, Present = 1, 2 - Available = 0, Granularity = 0
    uint8_t flags_1 = 0x89;
    uint8_t flags_2 = 0;
 
    // Create the TSS descriptors
    uint64_t tss_descriptor_low = (uint64_t) base_3 << 56 | (uint64_t) flags_2 << 48 | (uint64_t) flags_1 << 40 | (uint64_t) base_2 << 32 | (uint64_t) base_1 << 16 | (uint64_t) limit_low;
    uint64_t tss_descriptor_high = base_4;
 
    // Store in the GDT
    gdt -> table[5] = tss_descriptor_low;
    gdt -> table[6] = tss_descriptor_high;
    gdt -> load();
 
    // Load the TSS
    Logger::DEBUG() << "Loading TSS: 0x0" << tss_descriptor_low << " 0x0" << tss_descriptor_high << " at 0x" << (uint64_t) &tss << "\n";
    asm volatile("ltr %%ax" : : "a" (0x28));
 
}

References MaxOS::system::BOOT_STACK_SIZE, MaxOS::Logger::DEBUG(), gdt, MaxOS::system::IO_BITMAP_SIZE, m_stack, and tss.

Referenced by init().

◆ wake_up()

void Core::wake_up ( CPU * cpu )

Wakes up the core by sending the appropriate IPIs. (see core_loader.s for startup code)

Parameters

cpu

Todo:: Should handle core fails and not delay once we are in c++

Definition at line 60 of file cpu.cpp.

                           {
 
    // Boot core is already setup
    if(m_bsp){
        Logger::DEBUG() << "BSP Already setup\n";
        return;
    }
 
    Logger::DEBUG() << "Starting core: " << id << "\n";
 
    // Core specific boot info
    volatile auto info = (core_boot_info_t*)(core_boot_info);
    info->activated = false;
    info->id = id;
    info->stack = m_stack + BOOT_STACK_SIZE;
 
    // Send init IPI
    cpu->apic.local_apic()->send_init(m_apic_id, true);
 
    // Send de-assert IPI
    cpu->apic.local_apic()->send_init(m_apic_id, false);
    Clock::active_clock()->delay(10);
 
    // Send tow SIPIs
    for (int i = 0; i < 2; ++i) {
 
        // Send the start up IPI
        cpu->apic.local_apic()->send_startup(m_apic_id, 0x8);
        Clock::active_clock()->delay(200);
 
        // Check if core started
        if(info->activated){
 
            // Wait for full init
            while(!active)
                asm("nop");
 
            Logger::DEBUG() << "Core " << id << " started successfully \n";
            return;
        }
    }
 
    Logger::WARNING() << "Failed to start core: " << id << "\n";
}

References active, MaxOS::hardwarecommunication::Clock::active_clock(), MaxOS::system::CPU::apic, MaxOS::system::BOOT_STACK_SIZE, core_boot_info, MaxOS::Logger::DEBUG(), MaxOS::hardwarecommunication::Clock::delay(), id, MaxOS::hardwarecommunication::AdvancedProgrammableInterruptController::local_apic(), m_apic_id, m_bsp, m_stack, MaxOS::hardwarecommunication::LocalAPIC::send_init(), MaxOS::hardwarecommunication::LocalAPIC::send_startup(), and MaxOS::Logger::WARNING().

Friends And Related Symbol Documentation

◆ CPU

friend class CPU

friend

Definition at line 218 of file cpu.h.

Member Data Documentation

◆ active

bool MaxOS::system::Core::active = false

Whether this core is active.

Definition at line 245 of file cpu.h.

Referenced by init(), and wake_up().

◆ avx_enabled

bool MaxOS::system::Core::avx_enabled = false

Whether AVX is enabled.

Definition at line 238 of file cpu.h.

Referenced by init_sse().

◆ gdt

GlobalDescriptorTable* MaxOS::system::Core::gdt = nullptr

The GDT for this core.

Definition at line 248 of file cpu.h.

Referenced by init(), and init_tss().

◆ id

uint8_t MaxOS::system::Core::id

The ID of this core.

Definition at line 243 of file cpu.h.

Referenced by MaxOS::system::CPU::PANIC(), MaxOS::processes::GlobalScheduler::print_running_header(), and wake_up().

◆ local_apic

hardwarecommunication::LocalAPIC* MaxOS::system::Core::local_apic = nullptr

The local APIC for this core.

Definition at line 247 of file cpu.h.

Referenced by MaxOS::hardwarecommunication::InterruptManager::handle_interrupt_request(), init(), and MaxOS::system::CPU::prepare_for_panic().

◆ m_apic_id

uint8_t MaxOS::system::Core::m_apic_id

protected

The ID of the apic for this core.

Definition at line 227 of file cpu.h.

Referenced by Core(), and wake_up().

◆ m_bsp

bool MaxOS::system::Core::m_bsp = false

protected

Whether this core is the bootstrap processor.

Definition at line 225 of file cpu.h.

Referenced by wake_up().

◆ m_can_enable

bool MaxOS::system::Core::m_can_enable = false

protected

Whether the core can be enabled.

Definition at line 224 of file cpu.h.

Referenced by Core().

◆ m_enabled

bool MaxOS::system::Core::m_enabled = false

protected

Whether the core is enabled.

Definition at line 223 of file cpu.h.

Referenced by Core().

◆ m_madt

hardwarecommunication::madt_processor_apic_t* MaxOS::system::Core::m_madt

protected

The MADT entry for this core.

Definition at line 221 of file cpu.h.

Referenced by Core().

◆ m_stack

uint64_t MaxOS::system::Core::m_stack = 0

protected

The stack pointer for this core.

Definition at line 228 of file cpu.h.

Referenced by Core(), init_tss(), and wake_up().

◆ scheduler

processes::Scheduler* MaxOS::system::Core::scheduler = nullptr

The scheduler for this core.

Definition at line 249 of file cpu.h.

Referenced by MaxOS::processes::GlobalScheduler::add_process(), MaxOS::processes::GlobalScheduler::add_thread(), and MaxOS::processes::GlobalScheduler::core_scheduler().

◆ tss

tss_t MaxOS::system::Core::tss = { }

The Task State Segment for this core.

Definition at line 244 of file cpu.h.

244{ };

Referenced by init_tss().

◆ xsave_enabled

bool MaxOS::system::Core::xsave_enabled = false

Whether XSAVE is enabled.

Definition at line 237 of file cpu.h.

Referenced by init_sse().

The documentation for this class was generated from the following files:

/home/runner/work/MaxOS/MaxOS/kernel/include/system/cpu.h
/home/runner/work/MaxOS/MaxOS/kernel/src/system/cpu.cpp

Public Member Functions

Public Attributes

Protected Member Functions

Protected Attributes

Friends

Detailed Description

Constructor & Destructor Documentation

◆ Core()

Member Function Documentation

◆ init()

◆ init_sse()

◆ init_tss()

◆ wake_up()

Friends And Related Symbol Documentation

◆ CPU

Member Data Documentation

◆ active

◆ avx_enabled

◆ gdt

◆ id

◆ local_apic

◆ m_apic_id

◆ m_bsp

◆ m_can_enable

◆ m_enabled

◆ m_madt

◆ m_stack

◆ scheduler

◆ tss

◆ xsave_enabled